Piyush Goyal leads India’s Japan delegation as New Delhi moves to ease BIS certification for imported semiconductor equipment.
India will draft a framework exempting high-tech manufacturers from mandatory Bureau of Indian Standards certification on imported capital equipment, Union Commerce and Industry Minister Piyush Goyal announced on August 25 during a roundtable with roughly twenty-five Japanese semiconductor and AI companies. The move responds directly to concerns raised by Tokyo Electron, whose Executive Vice-President Takeshi Okubo flagged certification delays as a bottleneck for setting up manufacturing in India.
Goyal confirmed that BIS and the Commerce Ministry have already been instructed to draft the exemption, with rules expected within roughly two months of his return from the four-day Japan trip covering Tokyo, Nagoya and Osaka.
Where the Friction Comes From
The core problem is a mismatch of regulatory design. BIS Quality Control Orders were built under Section 16 of the BIS Act to protect retail consumers from substandard mass-market goods such as appliances or steel. Semiconductor fabrication equipment, however, is nothing like a retail product: photolithography machines, chemical vapour deposition tools and atomic layer etching systems are produced in tiny volumes by a handful of global suppliers, customised for specific factories and never sold on open markets. When such machinery falls under a blanket QCO, foreign manufacturers must undergo the Foreign Manufacturers Certification Scheme, involving technical documentation, in-country testing and a physical audit of the overseas plant, a process that can take upward of six months. For a capital-intensive fab project, that delay can idle billions of dollars of equipment at the port.
Existing carve-outs offer little relief. Research and development imports are exempt only if goods are never sold commercially and are eventually exported or scrapped, while a separate exemption caps R&D imports at 200 units annually, workable for prototyping but useless for a commercial-scale fab needing thousands of components continuously.
Four Possible Paths
Goyal outlined four potential exemption structures rather than a single fixed mechanism: project-based exemptions tied to approved facilities such as Tata Electronics’ Dholera fab, company-based exemptions whitelisting trusted global suppliers such as Tokyo Electron, product-based exemptions carving out specific equipment categories from QCO lists, and broader sector-wide bulk exemptions. Each carries trade-offs. Project-based relief is the most easily audited since equipment tied to a monitored site poses negligible risk of entering retail markets. Company-based whitelisting cuts border friction but requires defining objective trust criteria. Product-based exemptions offer lasting clarity but risk becoming outdated as technology evolves quickly. Bulk exemptions promise maximum speed but carry the highest risk of regulatory arbitrage.
The government is expected to lean on Section 25(2) of the BIS Act, which allows the Centre to direct BIS on exemptions and no-objection certificates without requiring a full parliamentary amendment.
Tied to Semicon 2.0’s Bigger Bet
The exemption effort is not a standalone policy. It directly supports Pillar 2 of Semicon 2.0, the ₹1,27,500 crore programme approved by the Union Cabinet in July 2026, which explicitly targets the machinery, chemicals and ultra-pure gases that feed semiconductor fabs. This follows Semicon 1.0’s roughly $10 billion in incentives, which seeded about $19 billion in investment across 13 projects including fabs run by Micron and CG Semi with Japan’s Renesas. Semicon 2.0 aims to seed a further $50 billion, against a domestic semiconductor demand projected to reach $150 billion by 2032.
For MeitY, the stakes extend further. Domestic value addition in mobile manufacturing currently sits at 22 to 23 percent, and the ministry has set a goal of raising this to 35 to 40 percent, a shift that requires moving beyond assembly toward genuine component and semiconductor manufacturing, something that in turn requires unobstructed equipment imports.
The India-Japan Angle
The announcement builds on a 2023 semiconductor supply chain cooperation agreement between MeitY and Japan’s METI. Tata Electronics has already signed an MoU with Tokyo Electron covering equipment infrastructure for the Dholera fab and the Jagiroad assembly facility in Assam. Beyond certification, Goyal also addressed broader concerns raised by firms such as Fuji Electric around regulatory complexity, committing to improve social infrastructure, schooling, housing and utilities, around Japanese industrial hubs near Dholera and Sanand.
The Risks Ahead
Goyal himself flagged the central risk: blanket exemptions could open the door to dumping or predatory pricing from geopolitical competitors, particularly amid global efforts to de-risk semiconductor supply chains from non-market economies. He explicitly warned that requests aimed at importing cheap, unfairly priced goods would not be accommodated. This means any final framework will likely require strict origin-tracing and end-use monitoring, particularly if built around product-based exemptions where misclassification risk is highest.
Other open questions remain unresolved in the public record: how “high-tech industry” will be legally defined, whether exemptions will be permanent or subject to periodic audit and revocation, how central BIS relief will harmonise with state-level pollution and safety regulators, and whether easy imports might inadvertently undercut the ₹40,000 crore Electronics Component Manufacturing Scheme meant to localise component production.
What to Watch
With India’s first new fab targeted for commissioning in 2028, the two-month drafting window leaves little room for delay. The eventual notified text, and specifically whether it draws a workable line between genuine high-tech capital goods and everyday electronics, will determine whether this becomes a durable fix or another well-intentioned exemption that struggles against India’s broader quality-control architecture.
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